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Home | Research | M.Sc. And Ph.D Thesis | An Efficient Reconfigurable Archit ecture for Elliptic Binary Curve Encryption using A Proposed CryptographyAware Logic Synthesis Approach

An Efficient Reconfigurable Archit ecture for Elliptic Binary Curve Encryption using A Proposed CryptographyAware Logic Synthesis Approach

Thesis Title: 
An Efficient Reconfigurable Archit ecture for Elliptic Binary Curve Encryption using A Proposed CryptographyAware Logic Synthesis Approach
Name: 
Doaa Amin Mohamed Nassar
Date of Birth: 
Wed, 18/12/1974
Nationality: 
Egyptian
Degree: 
Doctor
Previous Degrees: 
B.Sc. (ELC) 1997 - Cairo M.Sc. (ELC) 2002 - Cairo
Registration Date: 
Sat, 10/04/2004
Awarding Date: 
Tue, 15/09/2009
Supervisors: 
External Supervisors: 

Dr. Salama, A. E. (The late)
Dr. El-Khorashi, M. W.

Examiners: 

Dr. Wahdan, A. A.
Dr. Ragaee, M. F. M.
Dr. Shousha, A. M.
Dr. El-Khorashi, M. W.

Key Words: 

Cryptography, Logic synthesis, Hardware

Summary: 

This thesis presents a cryptography-aware synthesis approach to translate security operation
specifications efficiently and dynamically from VHDL higher level specifications into robust
efficient implementations using Precision® Synthesis flow. This entails the use of cryptographyaware
operator inferencing, synthesize and map to required FPGA devices. Till the publishing of
this thesis, no previous work had been done in this area. Hence, we consider this as the main
contribution in the thesis. Also the other contribution is the design of reconfigurable
architecture for Elliptic Curve Cryptography (ECC) over GF(2m) using the latest FPGA
technology. The proposed processing unit incorporates special handling of the point
multiplication operation that is considered the main operation of any ECC. In this work, the
ECC point multiplication is implemented using the Montgomery method and mapped to 6-input
lookup tables. The proposed architecture could be applied for different binary curves, making it
suitable for use in many different ECC applications and environments. The implemented
architecture showed the smallest area published so far for ECC point multiplication. For
example, for GF(2193) our implementation gives 43% improvement in number of slices. The
methodology used modifies the operation of the commercial synthesis tool: Precision to make it
Cryptography-aware and thus infers crypto modules to achieve efficient mapping for Xilinx
devices.